Andrew Corporation (NASDAQ: ANDW) designs, manufactures, and delivers innovative and essential equipment and solutions for the global communications infrastructure market. The company serves operators and original equipment manufacturers from facilities in 35 countries. Andrew(www.andrew.com),
headquartered in Westchester, IL, is an S&P 500 company founded in 1937.
Andrew Corporation (NASDAQ: ANDW) designs, manufactures, and delivers innovative and essential equipment and solutions for the global communications infrastructure market. The company serves operators and original equipment manufacturers from facilities in 35 countries. Andrew (www.andrew.com), headquartered in Westchester, IL, is an S&P 500 company founded in 1937.
We are seeking an energetic and motivated person to join a small team of highly experienced engineers designing state of the art wireless base station products for Tier-1 OEM customers. Our OEM products department in Warren, NJ designs cutting edge input transceiver/power amplifier modules for major wireless base station customers.
The successful applicant will be developing FPGA / ASIC designs for a new generation of transceiver products for UMTS, LTE, WiMAX and multi-standard/multi-band digital repeater products. This role involves all stages of the design process from system design and simulation of the digital radio sections of our products, through design and implementation of the FPGA and verification in the final system.
This role may involve some travel between the design centers in the USA and Italy, and possibly to any of our global manufacturing sites or customers. (It is unlikely that this role will require an excessive amount of travel). The ideal candidate will have extensive experience writing complex VHDL for large FPGA or ASIC designs and will be familiar with ASIC design flow. This includes using version control to track code changes, using a bit exact model to verify rtl functionality, excellent communications skills and good documentation practices. The candidate must be able to complete complex design assignments with minimal supervision.
- VHDL experience is required. VHDL experience must include both RTL and behavioral level coding with significant experience writing code related to communications and signal processing functions. Experience writing VHDL to implement DSP and processor interfaces as well as communications interfaces such as CPRI or OBSAI is highly desired. Experience should also include the ability to write system level test benches.
- Experience designing complex systems with Altera Stratix-II FPGAs and/or Xilinx Virtex 5 FPGAs including familiarity with Alteras Quartus design tool and/or Xilinxs ISE tools. ASIC and/or Altera Hardcopy design experience is highly desired.
- Experience using MATLAB & Simulink for system level verification is required.
- Experience with Mentors Modelsim simulator is required
- Digital board level design experience as well as the ability to write scripts in Perl and TCL is highly desired.
- Experience gained in a telecom or other communication system environment is preferred. Candidates are sought with relevant knowledge of air interfaces and modulation schemes used in modern communication systems (OFDM, W-CDMA, etc) and familiarity with implementation of radio or modem functionality for these systems.
B.S.E.E. required. M.S.E.E preferred. A minimum of 5 years work experience designing and simulating FPGAs/ASICs is required.
It is the policy of Andrew Corporation to provide Equal Employment Opportunities to all individuals based on merit, qualifications and abilities. Andrew Corporation does not discriminate in employment opportunities or practices on the basis of race, color, religion, sex, national origin, age disability, or any other characteristics as protected by law.
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